Čeština / English
Login

SVN Repository / Prohlížení

Aktuální adresář: FITkit / trunk / mcu / libs / enc28j60 /

enc28j60_spi.h

   1  /*******************************************************************************
   2  
   3     Copyright (C) 2010 Brno University of Technology,
   4                        Faculty of Information Technology
   5     Author(s): Martin Musil <xmusil34 AT fit.vutbr.cz>
   6  
   7     LICENSE TERMS
   8  
   9     Redistribution and use in source and binary forms, with or without
  10     modification, are permitted provided that the following conditions
  11     are met:
  12     1. Redistributions of source code must retain the above copyright
  13        notice, this list of conditions and the following disclaimer.
  14     2. Redistributions in binary form must reproduce the above copyright
  15        notice, this list of conditions and the following disclaimer in
  16        the documentation and/or other materials provided with the
  17        distribution.
  18     3. All advertising materials mentioning features or use of this software
  19        or firmware must display the following acknowledgement:
  20  
  21          This product includes software developed by the University of
  22          Technology, Faculty of Information Technology, Brno and its
  23          contributors.
  24  
  25     4. Neither the name of the Company nor the names of its contributors
  26        may be used to endorse or promote products derived from this
  27        software without specific prior written permission.
  28  
  29     This software or firmware is provided ``as is'', and any express or implied
  30     warranties, including, but not limited to, the implied warranties of
  31     merchantability and fitness for a particular purpose are disclaimed.
  32     In no event shall the company or contributors be liable for any
  33     direct, indirect, incidental, special, exemplary, or consequential
  34     damages (including, but not limited to, procurement of substitute
  35     goods or services; loss of use, data, or profits; or business
  36     interruption) however caused and on any theory of liability, whether
  37     in contract, strict liability, or tort (including negligence or
  38     otherwise) arising in any way out of the use of this software, even
  39     if advised of the possibility of such damage.
  40  
  41     $Id$
  42  
  43  *******************************************************************************/
  44  
  45  /**
  46  	\file enc28j60_spi.h
  47  
  48  */
  49  
  50  #ifndef _ENC28J60_SPI_
  51  #define _ENC28J60_SPI_
  52  
  53  //tato knihovna zahrnuje dalsi 2 casti
  54  #include "enc28j60_spi_rx.h"
  55  #include "enc28j60_spi_tx.h"
  56  
  57  /**
  58   \cond
  59   **/
  60  #define NULL 0
  61  
  62  #define BASE_ADDR_CTRLREG 0xF0
  63  #define control_reg_write(data) FPGA_SPI_RW_A8_D8(SPI_FPGA_ENABLE_WRITE, BASE_ADDR_CTRLREG, data)
  64  #define control_reg_read() (FPGA_SPI_RW_A8_D8(SPI_FPGA_ENABLE_READ, BASE_ADDR_CTRLREG, 0))
  65  
  66  
  67  
  68  
  69  
  70  /**
  71   \endcond
  72   **/
  73  
  74  /**
  75   \brief Inicializace a start ENC28J60
  76  
  77  
  78   **/
  79  char ENC28J60_init();
  80  
  81  /**
  82   \cond
  83   **/
  84  
  85  //******************************************
  86  //fce cteni/zapis registru
  87  //******************************************
  88  
  89  
  90  
  91  /**
  92  
  93   \param addr - adresa registru
  94  
  95   \returns hodnota registru
  96   **/
  97  inline unsigned char read_reg8(unsigned char addr, unsigned char read_dummy);
  98  
  99  /**
 100  
 101   \param addr - adresa registru
 102  
 103   \returns hodnota registru
 104   **/
 105  inline unsigned int read_reg16(unsigned char addr, unsigned char read_dummy);
 106  
 107  /**
 108  
 109   \param addr - adresa registru
 110  
 111   **/
 112  inline void write_reg8(unsigned char addr, unsigned char data);
 113  
 114  /**
 115  
 116   \param addr - adresa registru
 117  
 118   **/
 119  inline void write_reg16(unsigned char addr, unsigned int data);
 120  
 121  /**
 122  
 123   \param addr - adresa registru
 124   \returns hodnota registru
 125   **/
 126  inline int read_phy_reg16(unsigned char addr);
 127  
 128  /**
 129  
 130   \param addr - adresa registru
 131  
 132   **/
 133  inline void write_phy_reg16(unsigned char addr, unsigned int data);
 134  
 135  /**
 136  
 137   \param addr - adresa registru
 138  
 139   **/
 140  inline void bf_set(unsigned char addr, unsigned char mask);
 141  
 142  
 143  /**
 144   \brief BFC (Bit Field Clear) - Vynuluje bity v registru podle masky, operace NOT AND
 145   \param addr - adresa registru
 146  
 147   **/
 148  inline void bf_clear(unsigned char addr, unsigned char mask);
 149  
 150  
 151  /**
 152   \brief Resetuje ENC28J60
 153   **/
 154  inline void enc_reset();
 155  
 156  /**
 157  
 158   \param bank - adresa registru
 159   \returns hodnota registru
 160   **/
 161  inline void select_bank(unsigned char bank);
 162  
 163  
 164  
 165  //******************************************
 166  //fce cteni/zapis do bufferu
 167  //******************************************
 168  
 169  /**
 170  
 171  
 172   **/
 173  unsigned char spi_getc();
 174  
 175  /**
 176  
 177   \param ptr - ukazatel do bufferu, kam se budou data zapisovat
 178  
 179  
 180   **/
 181  unsigned int spi_read(void* ptr, unsigned int length);
 182  
 183  /**
 184  
 185  
 186   \param ptr - ukazatel do bufferu, kam se budou data zapisovat
 187  
 188  
 189   **/
 190  unsigned int spi_getline(void* ptr, unsigned int max_length);
 191  
 192  /**
 193  
 194   \param c - bajt dat
 195   **/
 196  void spi_putc(unsigned char c);
 197  
 198  /**
 199  
 200  
 201  
 202   **/
 203  void spi_write(void* ptr, unsigned int length);
 204  
 205  /**
 206  
 207  
 208  
 209   **/
 210  void spi_fill(unsigned char value, unsigned int length);
 211  
 212  /**
 213  
 214  
 215  
 216   \see link_up()
 217   **/
 218  inline unsigned char link_change();
 219  
 220  /**
 221   \endcond
 222   **/
 223  
 224  /**
 225  
 226  
 227   \retval 0 - odpojeno
 228   \see link_change()
 229   **/
 230  inline unsigned char link_up();
 231  
 232  /**
 233   \cond
 234   **/
 235  
 236  //******************************************
 237  //SPI PRIKAZY
 238  //******************************************
 239  
 240  //SPI prikazy
 241  #define ENC_RCR 0x00
 242  #define ENC_RBM 0x3A
 243  #define ENC_WCR 0x40
 244  #define ENC_WBM 0x7A
 245  #define ENC_BFS 0x80
 246  #define ENC_BFC 0xA0
 247  #define ENC_RST 0xFF
 248  
 249  //******************************************
 250  //ADRESY REGISTRU
 251  //******************************************
 252  
 253  //banka 0
 254  #define ERDPTL 		0x00
 255  #define ERDPTH 		0x01
 256  #define EWRPTL 		0x02
 257  #define EWRPTH	 	0x03
 258  #define ETXSTL		0x04
 259  #define ETXSTH		0x05
 260  #define ETXNDL		0x06
 261  #define ETXNDH		0x07
 262  #define ERXSTL		0x08
 263  #define ERXSTH		0x09
 264  #define ERXNDL		0x0A
 265  #define ERXNDH		0x0B
 266  #define ERXRDPTL	0x0C
 267  #define ERXRDPTH	0x0D
 268  #define ERXWRPTL	0x0E
 269  #define ERXWRPTH	0x0F
 270  #define EDMASTL		0x10
 271  #define EDMASTH		0x11
 272  #define EDMANDL		0x12
 273  #define EDMANDH		0x13
 274  #define EDMADSTL	0x14
 275  #define EDMADSTH	0x15
 276  #define EDMACSL		0x16
 277  #define EDMACSH		0x17
 278  //16-bit
 279  #define ERDPT 		0x00
 280  #define EWRPT 		0x02
 281  #define ETXST		0x04
 282  #define ETXND		0x06
 283  #define ERXST		0x08
 284  #define ERXND		0x0A
 285  #define ERXRDPT		0x0C
 286  #define ERXWRPT		0x0E
 287  #define EDMAST		0x10
 288  #define EDMAND		0x12
 289  #define EDMADST		0x14
 290  #define EDMACS		0x16
 291  
 292  
 293  
 294  //banka 1
 295  #define EHT0		0x00
 296  #define EHT1		0x01
 297  #define EHT2		0x02
 298  #define EHT3		0x03
 299  #define EHT4		0x04
 300  #define EHT5		0x05
 301  #define EHT6		0x06
 302  #define EHT7		0x07
 303  #define EPMM0		0x08
 304  #define EPMM1		0x09
 305  #define EPMM2		0x0A
 306  #define EPMM3		0x0B
 307  #define EPMM4		0x0C
 308  #define EPMM5		0x0D
 309  #define EPMM6		0x0E
 310  #define EPMM7		0x0F
 311  #define EPMCSL		0x10
 312  #define EPMCSH		0x11
 313  #define EPMOL		0x14
 314  #define EPMOH		0x15
 315  #define ERXFCON		0x18
 316  #define EPKTCNT		0x19
 317  //16-bit
 318  #define EPMCS		0x10
 319  
 320  
 321  //banka 2
 322  #define MACON1 		0x00
 323  #define MACON2 		0x01
 324  #define MACON3 		0x02
 325  #define MACON4 		0x03
 326  #define MABBIPG 	0x04
 327  #define MAIPGL		0x06
 328  #define MAIPGH		0x07
 329  #define MACLCON1	0x08
 330  #define MACLCON2	0x09
 331  #define MAMXFLL		0x0A
 332  #define MAMXFLH		0x0B
 333  #define MICMD		0x12
 334  #define MIREGADR	0x14
 335  #define MIWRL		0x16
 336  #define MIWRH		0x17
 337  #define MIRDL		0x18
 338  #define MIRDH		0x19
 339  //16-bit
 340  #define MAIPG		0x06
 341  #define MAMXFL		0x0A
 342  #define MIWR		0x16
 343  #define MIRD		0x18
 344  
 345  //banka 3
 346  #define MAADR5 		0x00
 347  #define MAADR6 		0x01
 348  #define MAADR3 		0x02
 349  #define MAADR4	 	0x03
 350  #define MAADR1		0x04
 351  #define MAADR2		0x05
 352  #define EBSTSD		0x06
 353  #define EBSTCON		0x07
 354  #define EBSTCSL		0x08
 355  #define EBSTCSH		0x09
 356  #define MISTAT		0xA0
 357  #define EREVID		0x12
 358  #define ECOCON		0x15
 359  #define EFLOCON		0x17
 360  #define EPAUSL		0x18
 361  #define EPAUSH		0x19
 362  //16-bit
 363  #define EBSTCS		0x08
 364  
 365  
 366  //spolecne registry
 367  #define EIE			0x1B
 368  #define EIR			0x1C
 369  #define ESTAT		0x1D
 370  #define ECON2		0x1E
 371  #define ECON1		0x1F
 372  
 373  // PHY registry
 374  #define PHCON1      0x00
 375  #define PHSTAT1     0x01
 376  #define PHHID1      0x02
 377  #define PHHID2      0x03
 378  #define PHCON2      0x10
 379  #define PHSTAT2     0x11
 380  #define PHIE        0x12
 381  #define PHIR        0x13
 382  #define PHLCON      0x14
 383  
 384  //***********************************
 385  //BITY REGISTRU
 386  //***********************************
 387  
 388  // EIE
 389  #define EIE_INTIE       0x80
 390  #define EIE_PKTIE       0x40
 391  #define EIE_DMAIE       0x20
 392  #define EIE_LINKIE      0x10
 393  #define EIE_TXIE        0x08
 394  #define EIE_WOLIE       0x04
 395  #define EIE_TXERIE      0x02
 396  #define EIE_RXERIE      0x01
 397  
 398  // EIR
 399  #define EIR_PKTIF       0x40
 400  #define EIR_DMAIF       0x20
 401  #define EIR_LINKIF      0x10
 402  #define EIR_TXIF        0x08
 403  #define EIR_WOLIF       0x04
 404  #define EIR_TXERIF      0x02
 405  #define EIR_RXERIF      0x01
 406  
 407  // ESTAT
 408  #define ESTAT_INT       0x80
 409  #define ESTAT_BUFER     0x40
 410  #define ESTAT_LATECOL   0x10
 411  #define ESTAT_RXBUSY    0x04
 412  #define ESTAT_TXABRT    0x02
 413  #define ESTAT_CLKRDY    0x01
 414  
 415  // ECON2
 416  #define ECON2_AUTOINC   0x80
 417  #define ECON2_PKTDEC    0x40
 418  #define ECON2_PWRSV     0x20
 419  #define ECON2_VRPS      0x08
 420  
 421  // ECON1
 422  #define ECON1_TXRST     0x80
 423  #define ECON1_RXRST     0x40
 424  #define ECON1_DMAST     0x20
 425  #define ECON1_CSUMEN    0x10
 426  #define ECON1_TXRTS     0x08
 427  #define ECON1_RXEN      0x04
 428  #define ECON1_BSEL1     0x02
 429  #define ECON1_BSEL0     0x01
 430  
 431  // MACON1
 432  #define MACON1_LOOPBK   0x10
 433  #define MACON1_TXPAUS   0x08
 434  #define MACON1_RXPAUS   0x04
 435  #define MACON1_PASSALL  0x02
 436  #define MACON1_MARXEN   0x01
 437  
 438  // MACON2
 439  #define MACON2_MARST    0x80
 440  #define MACON2_RNDRST   0x40
 441  #define MACON2_MARXRST  0x08
 442  #define MACON2_RFUNRST  0x04
 443  #define MACON2_MATXRST  0x02
 444  #define MACON2_TFUNRST  0x01
 445  
 446  // MACON3
 447  #define MACON3_PADCFG2  0x80
 448  #define MACON3_PADCFG1  0x40
 449  #define MACON3_PADCFG0  0x20
 450  #define MACON3_TXCRCEN  0x10
 451  #define MACON3_PHDRLEN  0x08
 452  #define MACON3_HFRMLEN  0x04
 453  #define MACON3_FRMLNEN  0x02
 454  #define MACON3_FULDPX   0x01
 455  
 456  // MACON4
 457  #define MACON4_DEFER	0x40
 458  
 459  // MICMD
 460  #define MICMD_MIISCAN   0x02
 461  #define MICMD_MIIRD     0x01
 462  
 463  // MISTAT
 464  #define MISTAT_NVALID   0x04
 465  #define MISTAT_SCAN     0x02
 466  #define MISTAT_BUSY     0x01
 467  
 468  //PHIR
 469  #define PHIR_PLNKIF		0x0010
 470  
 471  //PHIE
 472  #define PHIE_PLNKIE		0x0010
 473  #define PHIE_PGEIE		0x0002
 474  
 475  // PHCON1
 476  #define PHCON1_PRST     0x8000
 477  #define PHCON1_PLOOPBK  0x4000
 478  #define PHCON1_PPWRSV   0x0800
 479  #define PHCON1_PDPXMD   0x0100
 480  
 481  // PHCON2
 482  #define PHCON2_FRCLINK  0x4000
 483  #define PHCON2_TXDIS    0x2000
 484  #define PHCON2_JABBER   0x0400
 485  #define PHCON2_HDLDIS   0x0100
 486  
 487  // PHSTAT1
 488  #define PHSTAT1_PFDPX   0x1000
 489  #define PHSTAT1_PHDPX   0x0800
 490  #define PHSTAT1_LLSTAT  0x0004
 491  #define PHSTAT1_JBSTAT  0x0002
 492  
 493  // PHSTAT2
 494  #define PHSTAT2_LSTAT	0x0400
 495  
 496  // PKTCTRL
 497  #define PKTCTRL_PHUGEEN     0x08
 498  #define PKTCTRL_PPADEN      0x04
 499  #define PKTCTRL_PCRCEN      0x02
 500  #define PKTCTRL_POVERRIDE   0x01
 501  
 502  /**
 503   \endcond
 504   **/
 505  
 506  #endif /*_ENC28J60_SPI_*/
 507  
Zobrazeno: 695380x Naposledy: 19.8.2022 13:30:01