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spi.c

   1  /*******************************************************************************
   2     spi.c:
   3     Copyright (C) 2009 Brno University of Technology,
   4                        Faculty of Information Technology
   5  
   6     LICENSE TERMS
   7  
   8     Redistribution and use in source and binary forms, with or without
   9     modification, are permitted provided that the following conditions
  10     are met:
  11     1. Redistributions of source code must retain the above copyright
  12        notice, this list of conditions and the following disclaimer.
  13     2. Redistributions in binary form must reproduce the above copyright
  14        notice, this list of conditions and the following disclaimer in
  15        the documentation and/or other materials provided with the
  16        distribution.
  17     3. All advertising materials mentioning features or use of this software
  18        or firmware must display the following acknowledgement:
  19  
  20          This product includes software developed by the University of
  21          Technology, Faculty of Information Technology, Brno and its
  22          contributors.
  23  
  24     4. Neither the name of the Company nor the names of its contributors
  25        may be used to endorse or promote products derived from this
  26        software without specific prior written permission.
  27  
  28     This software or firmware is provided ``as is'', and any express or implied
  29     warranties, including, but not limited to, the implied warranties of
  30     merchantability and fitness for a particular purpose are disclaimed.
  31     In no event shall the company or contributors be liable for any
  32     direct, indirect, incidental, special, exemplary, or consequential
  33     damages (including, but not limited to, procurement of substitute
  34     goods or services; loss of use, data, or profits; or business
  35     interruption) however caused and on any theory of liability, whether
  36     in contract, strict liability, or tort (including negligence or
  37     otherwise) arising in any way out of the use of this software, even
  38     if advised of the possibility of such damage.
  39  
  40     $Id$
  41  
  42     Popis:
  43       Funkce pro obsluhu SPI
  44  *******************************************************************************/
  45  
  46  
  47  #include "arch_specific.h"
  48  #include "define.h"
  49  #include "spi.h"
  50  
  51  /**
  52   \brief Inicializace SPI
  53   **/
  54  void SPI_Init(void) {
  55    #if defined MSP_16X
  56      // nastaveni SPI na UART1 (FITkit 1.x)
  57  
  58      U1CTL |= SWRST;                       /// uvest SPI do resetu
  59      U1CTL = SWRST | CHAR | SYNC | MM;     /// SPI mode, 8 bitu, master mode
  60      U1TCTL = CKPL | SSEL_3 | STC;         /// SMCLK clock (7MHz), idle polarita na 1
  61      U1BR0 = 2;                            /// rychlost na maximum (SMCLK/2)
  62      U1BR1 = 0;
  63      ME2   |= USPIE1;                      /// povoleni SPI
  64  
  65      // nastaveni vstup/vystupu
  66      SPI_PORT_DIR &= ~(SPI_DI);               // vstupy
  67      SPI_PORT_DIR |= SPI_CSn | INITn | SPI_DO | SPI_CLK;       //  vystupy
  68      SPI_PORT_OUT |= SPI_CSn | INITn | SPI_DO | SPI_CLK;       // vystupy na 1
  69  
  70      SPI_PORT_SEL |= SPI_DI | SPI_DO | SPI_CLK;        // pripojeni pinu na USART
  71  
  72      U1CTL     &= ~SWRST;                  // povoleni SPI (zruseni resetu)
  73    #elif defined MSP_261X
  74      // nastaveni SPI na UCB1 (FITkit 2.x)
  75  
  76      UCB1CTL1 = UCSWRST;                   /// Reset UCB1
  77  
  78      UCB1CTL0 = UCCKPL | UCMST | UCMSB | UCMODE_0 | UCSYNC; /// SPI mode, 8 bitu, master mode, idle polarita na 1
  79      UCB1CTL1 |= UCSSEL_2;         /// SMCLK clock
  80      UCB1BR0 = 2;                  /// rychlost SMCLK/2 (teoreticky muze jet i na SMCLK/1, ale je treba zvysit frekv. v FPGA)
  81      UCB1BR1 = 0;
  82  
  83      // nastaveni vstup/vystupu
  84      SPI_PORT_DIR &= ~(SPI_DI);                   // vstupy
  85      SPI_PORT_DIR |= SPI_CSn | INITn | SPI_DO | SPI_CLK;  // vystupy
  86      SPI_PORT_OUT |= SPI_CSn | INITn | SPI_DO | SPI_CLK;  // vystupy na 1
  87  
  88      SPI_PORT_SEL |= SPI_DI | SPI_DO | SPI_CLK;   // pripojeni pinu na UCB1
  89  
  90      //UC1IFG = 0;
  91      UC1IE &= ~(UCB1TXIE | UCB1RXIE);
  92  
  93      UCB1CTL1 &= ~UCSWRST;                     // odresetovani UCB1
  94    #else
  95      #error "Can't initialize SPI"
  96    #endif
  97  }
  98  
  99  /**
 100   \brief Deaktivace SPI
 101   **/
 102  void SPI_Close(void) {
 103    #if defined MSP_16X
 104      // deaktivace SPI
 105      ME2  &= ~USPIE1;                      // povoleni SPI
 106      U1CTL =  SWRST;                       // zakaz (reset) SPI
 107    #elif defined MSP_261X
 108      UCB1CTL1 |= UCSWRST;                   /// Reset UCB1
 109    #endif
 110  
 111    // deaktivace vstupu/vystupu
 112    SPI_PORT_SEL &= ~(SPI_DI | SPI_DO | SPI_CLK);     // odpojeni pinu na USART1 SPI
 113    SPI_PORT_DIR &= ~(SPI_DI | SPI_DO | SPI_CLK | SPI_CSn);   // vsechno vstupy
 114  }
 115  
 116  /**
 117  
 118  
 119  
 120   **/
 121  inline unsigned char SPI_read_wait_write(unsigned char datain) {
 122    unsigned char result;  /* nacteni dat */
 123    while (SPI_BUSY) WDG_reset();
 124    result = SPI_RX_BUF;
 125    SPI_TX_BUF = datain;  /* vyslani datoveho byte pres SPI  */
 126    return result;
 127  }
 128  
 129  
 130  /**
 131  
 132  
 133  
 134   **/
 135  inline unsigned char SPI_write_wait_read(unsigned char datain) {
 136    SPI_TX_BUF = datain;  /* vyslani datoveho byte pres SPI  */
 137  
 138    while (SPI_BUSY) WDG_reset();
 139    //  while (SPI_TX_BUF_FULL) WDG_reset(); /* cekani, az je odvysilano */
 140  
 141    return SPI_RX_BUF; /* precteni prijate hodnoty */
 142  }
 143  
Zobrazeno: 731759x Naposledy: 29.11.2022 06:22:41