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flash_fpga.h

   1  /*******************************************************************************
   2     flash_fpga.h:
   3     Copyright (C) 2009 Brno University of Technology,
   4                        Faculty of Information Technology
   5  
   6     LICENSE TERMS
   7  
   8     Redistribution and use in source and binary forms, with or without
   9     modification, are permitted provided that the following conditions
  10     are met:
  11     1. Redistributions of source code must retain the above copyright
  12        notice, this list of conditions and the following disclaimer.
  13     2. Redistributions in binary form must reproduce the above copyright
  14        notice, this list of conditions and the following disclaimer in
  15        the documentation and/or other materials provided with the
  16        distribution.
  17     3. All advertising materials mentioning features or use of this software
  18        or firmware must display the following acknowledgement:
  19  
  20          This product includes software developed by the University of
  21          Technology, Faculty of Information Technology, Brno and its
  22          contributors.
  23  
  24     4. Neither the name of the Company nor the names of its contributors
  25        may be used to endorse or promote products derived from this
  26        software without specific prior written permission.
  27  
  28     This software or firmware is provided ``as is'', and any express or implied
  29     warranties, including, but not limited to, the implied warranties of
  30     merchantability and fitness for a particular purpose are disclaimed.
  31     In no event shall the company or contributors be liable for any
  32     direct, indirect, incidental, special, exemplary, or consequential
  33     damages (including, but not limited to, procurement of substitute
  34     goods or services; loss of use, data, or profits; or business
  35     interruption) however caused and on any theory of liability, whether
  36     in contract, strict liability, or tort (including negligence or
  37     otherwise) arising in any way out of the use of this software, even
  38     if advised of the possibility of such damage.
  39  
  40     $Id$
  41  
  42     Popis:
  43       Sdileny ovladac pro flash pamet and FPGA SpartanIII.
  44  *******************************************************************************/
  45  
  46  
  47  #ifndef _FLASH_FPGA_H_
  48  #define _FLASH_FPGA_H_
  49  
  50  // SPI rozhrani a SpartanIII
  51  #define FCSn    BIT0        ///< chip select Flash pameti, aktivni v 0
  52  #define FSI     BIT1        ///< datovy vstup Flash pameti
  53  #define FSO     BIT2        ///< datovy vystup Flash pameti
  54  #define FSCK    BIT3        ///< hodinovy vstup Flash pameti
  55  #define DONE    BIT7        ///< DONE vstup do FPGA
  56  #define INITn   BIT4        ///< INIT vstup/vystup FPGA, aktivni v 0
  57  #define PROGn   BIT6        ///< PROG vstup do FPGA, aktivni v 0
  58  
  59  // port SPI
  60  #define FLPORTDIR   P5DIR       ///< direct port
  61  #define FLPORTIN    P5IN        ///< vstupni port
  62  #define FLPORTOUT   P5OUT       ///< vystupni port
  63  #define FLPORTSEL   P5SEL       ///< selekcni port
  64  
  65  /**
  66  
  67   **/
  68  void FPGAConfig_init(void);
  69  
  70  /**
  71  
  72  
  73  
  74   **/
  75  unsigned char FPGAConfig_initialize(void);
  76  
  77  /**
  78  
  79  
  80  
  81   **/
  82  unsigned char FPGAConfig_finalize(void);
  83  
  84  /**
  85   \brief Detekce typu FPGA.
  86   \return 0 - FPGA neodpovida zvolenemu IDcode
  87          \n 1 - FPGA odpovida zvolenemu IDcode
  88   **/
  89  unsigned char FPGAConfig_detect_fpga(unsigned long idcode);
  90  
  91  #define FPGAConfig_DONE() (P4IN & DONE)
  92  
  93  #define FPGAConfig_INITn() (P5IN & INITn)
  94  
  95  #endif        /* _FLASH_FPGA_H_ */
  96  
Zobrazeno: 731756x Naposledy: 29.11.2022 06:14:13