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sirc_entity.vhd
1 -- sirc_entity.vhd: Sony SIRC code entity
2 -- Copyright (C) 2009 Brno University of Technology,
3 -- Faculty of Information Technology
4 -- Author(s): Michal RĹŻĹľek <xruzek01 AT stud.fit.vutbr.cz>
5 --
6 -- LICENSE TERMS
7 --
8 -- Redistribution and use in source and binary forms, with or without
9 -- modification, are permitted provided that the following conditions
10 -- are met:
11 -- 1. Redistributions of source code must retain the above copyright
12 -- notice, this list of conditions and the following disclaimer.
13 -- 2. Redistributions in binary form must reproduce the above copyright
14 -- notice, this list of conditions and the following disclaimer in
15 -- the documentation and/or other materials provided with the
16 -- distribution.
17 -- 3. All advertising materials mentioning features or use of this software
18 -- or firmware must display the following acknowledgement:
19 --
20 -- This product includes software developed by the University of
21 -- Technology, Faculty of Information Technology, Brno and its
22 -- contributors.
23 --
24 -- 4. Neither the name of the Company nor the names of its contributors
25 -- may be used to endorse or promote products derived from this
26 -- software without specific prior written permission.
27 --
28 -- This software or firmware is provided ``as is'', and any express or implied
29 -- warranties, including, but not limited to, the implied warranties of
30 -- merchantability and fitness for a particular purpose are disclaimed.
31 -- In no event shall the company or contributors be liable for any
32 -- direct, indirect, incidental, special, exemplary, or consequential
33 -- damages (including, but not limited to, procurement of substitute
34 -- goods or services; loss of use, data, or profits; or business
35 -- interruption) however caused and on any theory of liability, whether
36 -- in contract, strict liability, or tort (including negligence or
37 -- otherwise) arising in any way out of the use of this software, even
38 -- if advised of the possibility of such damage.
39 --
40 -- $Id$
41 --
42 --
43 library IEEE;
44 use IEEE.STD_LOGIC_1164.ALL;
45 use IEEE.STD_LOGIC_ARITH.ALL;
46 use IEEE.STD_LOGIC_UNSIGNED.ALL;
47
48 entity ir_SIRC is
49 port (
50 -- Reset a synchronizace
51 RST : in std_logic;
52 CLK : in std_logic;
53
54 -- V/V signaly z IR modulu
55 IR_IN : in std_logic;
56 IR_OUT : out std_logic;
57
58 -- Vstup do dekoderu SIRC
59 DATA_IN : in std_logic_vector(23 downto 0);
60 WRITE_12_EN : in std_logic;
61 WRITE_15_EN : in std_logic;
62 WRITE_20_EN : in std_logic;
63 BUSY : out std_logic;
64
65 -- Vystup z dekoderu SIRC
66 DATA_OUT : out std_logic_vector(23 downto 0);
67 DATA_12_VLD : out std_logic ;
68 DATA_15_VLD : out std_logic;
69 DATA_20_VLD : out std_logic
70 );
71 end ir_SIRC;
72