enc28j60_spi.h

00001 /*******************************************************************************
00002    enc28j60_spi.h: Knihovna funkcí pro komunikaci s ENC28J60
00003    Copyright (C) 2010 Brno University of Technology,
00004                       Faculty of Information Technology
00005    Author(s): Martin Musil <xmusil34 AT fit.vutbr.cz>
00006 
00007    LICENSE TERMS
00008 
00009    Redistribution and use in source and binary forms, with or without
00010    modification, are permitted provided that the following conditions
00011    are met:
00012    1. Redistributions of source code must retain the above copyright
00013       notice, this list of conditions and the following disclaimer.
00014    2. Redistributions in binary form must reproduce the above copyright
00015       notice, this list of conditions and the following disclaimer in
00016       the documentation and/or other materials provided with the
00017       distribution.
00018    3. All advertising materials mentioning features or use of this software
00019       or firmware must display the following acknowledgement:
00020 
00021         This product includes software developed by the University of
00022         Technology, Faculty of Information Technology, Brno and its
00023         contributors.
00024 
00025    4. Neither the name of the Company nor the names of its contributors
00026       may be used to endorse or promote products derived from this
00027       software without specific prior written permission.
00028 
00029    This software or firmware is provided ``as is'', and any express or implied
00030    warranties, including, but not limited to, the implied warranties of
00031    merchantability and fitness for a particular purpose are disclaimed.
00032    In no event shall the company or contributors be liable for any
00033    direct, indirect, incidental, special, exemplary, or consequential
00034    damages (including, but not limited to, procurement of substitute
00035    goods or services; loss of use, data, or profits; or business
00036    interruption) however caused and on any theory of liability, whether
00037    in contract, strict liability, or tort (including negligence or
00038    otherwise) arising in any way out of the use of this software, even
00039    if advised of the possibility of such damage.
00040 
00041    $Id$
00042 
00043 *******************************************************************************/ 
00044 
00050 #ifndef _ENC28J60_SPI_
00051 #define _ENC28J60_SPI_
00052 
00053 //tato knihovna zahrnuje dalsi 2 casti
00054 #include "enc28j60_spi_rx.h"
00055 #include "enc28j60_spi_tx.h"
00056 
00060 #define NULL 0
00061 
00062 #define BASE_ADDR_CTRLREG 0xF0
00063 #define control_reg_write(data) FPGA_SPI_RW_A8_D8(SPI_FPGA_ENABLE_WRITE, BASE_ADDR_CTRLREG, data)
00064 #define control_reg_read() (FPGA_SPI_RW_A8_D8(SPI_FPGA_ENABLE_READ, BASE_ADDR_CTRLREG, 0))
00065 
00066 
00067 #define ETH_CRC_LEN     4       
00068 #define PTR_LEN 2               
00069 
00070 
00079 char ENC28J60_init();
00080 
00085 //******************************************
00086 //fce cteni/zapis registru
00087 //******************************************
00088 #define NO_DUMMY 0      
00089 #define DUMMY 0xAA      
00090 
00091 
00097 inline unsigned char read_reg8(unsigned char addr, unsigned char read_dummy);
00098 
00105 inline unsigned int read_reg16(unsigned char addr, unsigned char read_dummy);
00106 
00112 inline void write_reg8(unsigned char addr, unsigned char data);
00113 
00119 inline void write_reg16(unsigned char addr, unsigned int data);
00120 
00126 inline int read_phy_reg16(unsigned char addr);
00127 
00133 inline void write_phy_reg16(unsigned char addr, unsigned int data);
00134 
00140 inline void bf_set(unsigned char addr, unsigned char mask);
00141 
00142 
00148 inline void bf_clear(unsigned char addr, unsigned char mask);
00149 
00150 
00154 inline void enc_reset();
00155 
00161 inline void select_bank(unsigned char bank);
00162 
00163 
00164 
00165 //******************************************
00166 //fce cteni/zapis do bufferu
00167 //******************************************
00168 
00173 unsigned char spi_getc();
00174 
00181 unsigned int spi_read(void* ptr, unsigned int length);
00182 
00190 unsigned int spi_getline(void* ptr, unsigned int max_length);
00191 
00196 void spi_putc(unsigned char c);
00197 
00203 void spi_write(void* ptr, unsigned int length);
00204 
00210 void spi_fill(unsigned char value, unsigned int length);
00211 
00218 inline unsigned char link_change();
00219 
00230 inline unsigned char link_up();
00231 
00236 //******************************************
00237 //SPI PRIKAZY
00238 //******************************************
00239 
00240 //SPI prikazy
00241 #define ENC_RCR 0x00
00242 #define ENC_RBM 0x3A
00243 #define ENC_WCR 0x40
00244 #define ENC_WBM 0x7A
00245 #define ENC_BFS 0x80
00246 #define ENC_BFC 0xA0
00247 #define ENC_RST 0xFF
00248 
00249 //******************************************
00250 //ADRESY REGISTRU
00251 //******************************************
00252 
00253 //banka 0
00254 #define ERDPTL          0x00
00255 #define ERDPTH          0x01
00256 #define EWRPTL          0x02
00257 #define EWRPTH          0x03
00258 #define ETXSTL          0x04
00259 #define ETXSTH          0x05
00260 #define ETXNDL          0x06
00261 #define ETXNDH          0x07
00262 #define ERXSTL          0x08
00263 #define ERXSTH          0x09
00264 #define ERXNDL          0x0A
00265 #define ERXNDH          0x0B
00266 #define ERXRDPTL        0x0C
00267 #define ERXRDPTH        0x0D
00268 #define ERXWRPTL        0x0E
00269 #define ERXWRPTH        0x0F
00270 #define EDMASTL         0x10
00271 #define EDMASTH         0x11
00272 #define EDMANDL         0x12
00273 #define EDMANDH         0x13
00274 #define EDMADSTL        0x14
00275 #define EDMADSTH        0x15
00276 #define EDMACSL         0x16
00277 #define EDMACSH         0x17
00278 //16-bit
00279 #define ERDPT           0x00
00280 #define EWRPT           0x02
00281 #define ETXST           0x04
00282 #define ETXND           0x06
00283 #define ERXST           0x08
00284 #define ERXND           0x0A
00285 #define ERXRDPT         0x0C
00286 #define ERXWRPT         0x0E
00287 #define EDMAST          0x10
00288 #define EDMAND          0x12
00289 #define EDMADST         0x14
00290 #define EDMACS          0x16
00291 
00292 
00293 
00294 //banka 1
00295 #define EHT0            0x00
00296 #define EHT1            0x01
00297 #define EHT2            0x02
00298 #define EHT3            0x03
00299 #define EHT4            0x04
00300 #define EHT5            0x05
00301 #define EHT6            0x06
00302 #define EHT7            0x07
00303 #define EPMM0           0x08
00304 #define EPMM1           0x09
00305 #define EPMM2           0x0A
00306 #define EPMM3           0x0B
00307 #define EPMM4           0x0C
00308 #define EPMM5           0x0D
00309 #define EPMM6           0x0E
00310 #define EPMM7           0x0F
00311 #define EPMCSL          0x10
00312 #define EPMCSH          0x11
00313 #define EPMOL           0x14
00314 #define EPMOH           0x15
00315 #define ERXFCON         0x18
00316 #define EPKTCNT         0x19
00317 //16-bit
00318 #define EPMCS           0x10
00319 
00320 
00321 //banka 2
00322 #define MACON1          0x00
00323 #define MACON2          0x01
00324 #define MACON3          0x02
00325 #define MACON4          0x03
00326 #define MABBIPG         0x04
00327 #define MAIPGL          0x06
00328 #define MAIPGH          0x07
00329 #define MACLCON1        0x08
00330 #define MACLCON2        0x09
00331 #define MAMXFLL         0x0A
00332 #define MAMXFLH         0x0B
00333 #define MICMD           0x12
00334 #define MIREGADR        0x14
00335 #define MIWRL           0x16
00336 #define MIWRH           0x17
00337 #define MIRDL           0x18
00338 #define MIRDH           0x19
00339 //16-bit
00340 #define MAIPG           0x06
00341 #define MAMXFL          0x0A
00342 #define MIWR            0x16
00343 #define MIRD            0x18
00344 
00345 //banka 3
00346 #define MAADR5          0x00
00347 #define MAADR6          0x01
00348 #define MAADR3          0x02
00349 #define MAADR4          0x03
00350 #define MAADR1          0x04
00351 #define MAADR2          0x05
00352 #define EBSTSD          0x06
00353 #define EBSTCON         0x07
00354 #define EBSTCSL         0x08
00355 #define EBSTCSH         0x09
00356 #define MISTAT          0xA0
00357 #define EREVID          0x12
00358 #define ECOCON          0x15
00359 #define EFLOCON         0x17
00360 #define EPAUSL          0x18
00361 #define EPAUSH          0x19
00362 //16-bit
00363 #define EBSTCS          0x08
00364 
00365 
00366 //spolecne registry
00367 #define EIE                     0x1B
00368 #define EIR                     0x1C
00369 #define ESTAT           0x1D
00370 #define ECON2           0x1E
00371 #define ECON1           0x1F
00372 
00373 // PHY registry
00374 #define PHCON1      0x00
00375 #define PHSTAT1     0x01
00376 #define PHHID1      0x02
00377 #define PHHID2      0x03
00378 #define PHCON2      0x10
00379 #define PHSTAT2     0x11
00380 #define PHIE        0x12
00381 #define PHIR        0x13
00382 #define PHLCON      0x14
00383 
00384 //***********************************
00385 //BITY REGISTRU
00386 //***********************************
00387 
00388 // EIE
00389 #define EIE_INTIE       0x80
00390 #define EIE_PKTIE       0x40
00391 #define EIE_DMAIE       0x20
00392 #define EIE_LINKIE      0x10
00393 #define EIE_TXIE        0x08
00394 #define EIE_WOLIE       0x04
00395 #define EIE_TXERIE      0x02
00396 #define EIE_RXERIE      0x01
00397 
00398 // EIR
00399 #define EIR_PKTIF       0x40
00400 #define EIR_DMAIF       0x20
00401 #define EIR_LINKIF      0x10
00402 #define EIR_TXIF        0x08
00403 #define EIR_WOLIF       0x04
00404 #define EIR_TXERIF      0x02
00405 #define EIR_RXERIF      0x01
00406 
00407 // ESTAT
00408 #define ESTAT_INT       0x80
00409 #define ESTAT_BUFER     0x40
00410 #define ESTAT_LATECOL   0x10
00411 #define ESTAT_RXBUSY    0x04
00412 #define ESTAT_TXABRT    0x02
00413 #define ESTAT_CLKRDY    0x01
00414 
00415 // ECON2
00416 #define ECON2_AUTOINC   0x80
00417 #define ECON2_PKTDEC    0x40
00418 #define ECON2_PWRSV     0x20
00419 #define ECON2_VRPS      0x08
00420 
00421 // ECON1
00422 #define ECON1_TXRST     0x80
00423 #define ECON1_RXRST     0x40
00424 #define ECON1_DMAST     0x20
00425 #define ECON1_CSUMEN    0x10
00426 #define ECON1_TXRTS     0x08
00427 #define ECON1_RXEN      0x04
00428 #define ECON1_BSEL1     0x02
00429 #define ECON1_BSEL0     0x01
00430 
00431 // MACON1
00432 #define MACON1_LOOPBK   0x10
00433 #define MACON1_TXPAUS   0x08
00434 #define MACON1_RXPAUS   0x04
00435 #define MACON1_PASSALL  0x02
00436 #define MACON1_MARXEN   0x01
00437 
00438 // MACON2
00439 #define MACON2_MARST    0x80
00440 #define MACON2_RNDRST   0x40
00441 #define MACON2_MARXRST  0x08
00442 #define MACON2_RFUNRST  0x04
00443 #define MACON2_MATXRST  0x02
00444 #define MACON2_TFUNRST  0x01
00445 
00446 // MACON3
00447 #define MACON3_PADCFG2  0x80
00448 #define MACON3_PADCFG1  0x40
00449 #define MACON3_PADCFG0  0x20
00450 #define MACON3_TXCRCEN  0x10
00451 #define MACON3_PHDRLEN  0x08
00452 #define MACON3_HFRMLEN  0x04
00453 #define MACON3_FRMLNEN  0x02
00454 #define MACON3_FULDPX   0x01
00455 
00456 // MACON4
00457 #define MACON4_DEFER    0x40
00458 
00459 // MICMD
00460 #define MICMD_MIISCAN   0x02
00461 #define MICMD_MIIRD     0x01
00462 
00463 // MISTAT
00464 #define MISTAT_NVALID   0x04
00465 #define MISTAT_SCAN     0x02
00466 #define MISTAT_BUSY     0x01
00467 
00468 //PHIR
00469 #define PHIR_PLNKIF             0x0010
00470 
00471 //PHIE
00472 #define PHIE_PLNKIE             0x0010
00473 #define PHIE_PGEIE              0x0002
00474 
00475 // PHCON1
00476 #define PHCON1_PRST     0x8000
00477 #define PHCON1_PLOOPBK  0x4000
00478 #define PHCON1_PPWRSV   0x0800
00479 #define PHCON1_PDPXMD   0x0100
00480 
00481 // PHCON2
00482 #define PHCON2_FRCLINK  0x4000
00483 #define PHCON2_TXDIS    0x2000
00484 #define PHCON2_JABBER   0x0400
00485 #define PHCON2_HDLDIS   0x0100
00486 
00487 // PHSTAT1
00488 #define PHSTAT1_PFDPX   0x1000
00489 #define PHSTAT1_PHDPX   0x0800
00490 #define PHSTAT1_LLSTAT  0x0004
00491 #define PHSTAT1_JBSTAT  0x0002
00492 
00493 // PHSTAT2
00494 #define PHSTAT2_LSTAT   0x0400
00495 
00496 // PKTCTRL
00497 #define PKTCTRL_PHUGEEN     0x08
00498 #define PKTCTRL_PPADEN      0x04
00499 #define PKTCTRL_PCRCEN      0x02
00500 #define PKTCTRL_POVERRIDE   0x01
00501 
00506 #endif /*_ENC28J60_SPI_*/